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d a t a sh eet product speci?cation supersedes data of march 1995 file under integrated circuits, ic02 1996 jul 18 integrated circuits SAA5252 line twenty-one acquisition and display (litod)
1996 jul 18 2 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 features complete stand-alone line 21 decoder in one package on-chip display ram allowing full page text mode enhanced character display modes full colour captions rgb interface for standard colour decoder ics automatic handling of field 2 data automatic selection of (1h, 1v), (2h, 1v) or (2h, 2v) scan modes onboard osd facility using character generator rgb inputs to support existing osd ics i 2 c-bus or stand-alone pin control automatic data-ready signal generation on data acquisition can decode signals recorded on standard vhs and s-vhs tape. general description the SAA5252 (litod) is a single-chip cmos device, which will acquire, decode and display line 21 closed captioning data from a 525-line composite video signal. operation as an on-screen display (osd) device is also possible. normal and line progressive scan modes are supported. quick reference data ordering information symbol parameter min. typ. max. unit v dd supply voltage 4.5 5.0 5.5 v i dd supply current - 30 - ma v syn cvbs sync amplitude 0.1 0.3 0.6 v v vid cvbs video amplitude 0.7 1.0 1.4 v t amb operating ambient temperature - 20 - +70 c t stg storage temperature - 55 - +125 c type number package name description version SAA5252p dip24 plastic dual in-line package; 24 leads (600 mil) sot101-1 SAA5252t so24 plastic small outline package; 24 leads; body width 7.5 mm sot137-1
1996 jul 18 3 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 block diagram mbb623 - 1 character generator addressing control code interpreter and addressing character rom display timing rounding italics and rgb multiplexor page ram 17 16 15 14 13 9 10 11 12 i c interface 2 serial/ parallel and parity sync separator and acquisition timing adc data detector oscillator 5 3 4 7 86 2 1 23 24 20 22 21 19 18 v ss dd v vh i.c. rgbref blan r g b blanin rin gin bin dr sda scl i c/dc 2 oscin oscgnd oscout black iref cvbs SAA5252 fig.1 block diagram.
1996 jul 18 4 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 pinning symbol pin description cvbs 1 composite video input; signal should be connected via a 100 nf capacitor i 2 c/ dc 2 input selects i 2 c or direct control sda 3 serial data port for i 2 c-bus or mode select input for direct control scl 4 serial clock input for i 2 c-bus or mode select input for direct control dr 5 data-ready signal to microcontroller (active-low) or mode select input for direct control i.c. 6 internally connected; connect to v ss for normal operation v 7 vertical reference input for display timing h 8 horizontal reference input for display timing blanin 9 video blanking input from external osd device rin 10 red video input from external osd device gin 11 green video input from external osd device bin 12 blue video input from external osd device b 13 blue video output g 14 green video output r 15 red video output blan 16 video blanking output rgbref 17 input voltage de?ning output high level for rgb pins for closed captioning output v dd 18 +5 v supply v ss 19 0 v ground oscout 20 oscillator output oscin 21 oscillator input oscgnd 22 oscillator ground black 23 video black level storage input; connected to v ss via 100 nf capacitor iref 24 reference current input; connected to v ss via 27 k w resistor fig.2 pin configuration. 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 SAA5252 cvbs sda scl dr i.c. v h blanin rin gin bin b g r blan rgbref v dd v ss oscout oscin oscgnd black iref i c/dc 2 mbb622 - 1
1996 jul 18 5 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 limiting values in accordance with the absolute maximum rating system (iec 134). notes 1. this maximum value has an absolute maximum of 6.5 v independent of v dd . 2. the human body model esd simulation is equivalent to discharging a 100 pf capacitor via a 1.5 k w resistor, which produces a single discharge transient. reference philips semiconductors test method uzw-bo/fq-a302 (similar to mil-std 883c method 3015.7) . 3. the machine model esd simulation is equivalent to discharging a 200 pf capacitor via a resistor and series inductor with effective dynamic values of 25 w and 2.5 m h, which produces a damped oscillating discharge. reference philips semiconductors test method uzw-bo/fq-b302 (similar to eiaj ic-121 test method 20 condition c) . quality this device will meet the requirements of the philips semiconductors general quality specification uzw-bo/fq-0601 in accordance with quality reference handbook (order number 9397 750 00192) . this details the acceptance criteria for all q & r tests applied to the product. symbol parameter conditions min. max. unit v dd supply voltage (all supplies) - 0.3 +6.5 v v imax maximum input voltage (any input) note 1 - 0.3 v dd + 0.5 v v omax maximum output voltage (any output) note 1 - v dd + 0.5 v v dif difference between v ss and oscgnd - 0.25 v i iok dc input or output diode current - 20 ma i omax maximum output current (each output) - 10 ma t amb operating ambient temperature - 20 +70 c t stg storage temperature - 55 +125 c v es electrostatic handling human body model note 2 - 2000 +2000 v machine model note 3 - 200 +200 v
1996 jul 18 6 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 characteristics v dd = 5 to 5.5 v; v ss =0v; t amb = - 20 to +70 c; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit supplies v dd supply voltage 4.5 5.0 5.5 v i ddtot total supply current - 30 - ma inputs cvbs ( pin 1) v syn sync voltage amplitude 0.1 0.3 0.6 v v vid(p-p) video voltage amplitude (peak-to-peak value) 0.7 1.0 1.4 v v dat caption data voltage amplitude 0.25 0.35 0.49 v z source source impedance -- 250 w v i input switching voltage level of sync separator 1.7 2.0 2.3 v z i input impedance 2.5 5 - k w c i input capacitance -- 10 pf iref ( pin 24) r 24 resistor to ground - 27 - k w v 24 voltage on pin 24 - 1 2 v dd - v h( pin 8) v il low level input voltage - 0.3 - +0.8 v v ih high level input voltage 2.0 - v dd + 0.5 v i li input leakage current v i =0tov dd - 10 - +10 m a i imax maximum input current - 1 - +1 ma c i input capacitance -- 10 pf t r pulse rise time -- 5 m s t f pulse fall time -- 5 m s t w pulse width scan mode 1h 1 12 63 m s scan mode 2h 1 6 31 m s v( pin 7) v il low level input voltage - 0.3 - +0.8 v v ih high level input voltage 2.0 - v dd + 0.5 v i li input leakage current v i =0tov dd - 10 - +10 m a i imax maximum input current - 1 - +1 ma c i input capacitance -- 10 pf t r pulse rise time -- 5ns t f pulse fall time -- 5ns t w pulse width 1 --m s
1996 jul 18 7 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 rgbref ( pin , 17) v i input voltage - 0.3 - v dd v i li input leakage current v i = 0 to v dd - 10 - +10 m a r, g and b( pins 15, 14 and 13); note 1 v il low level input voltage - 0.3 - 0.8 v v ih high level input voltage 2.0 - v dd + 0.5 v z i input impedance 2.5 5.0 - k w blanin ( pin 9) v il low level input voltage - 0.3 - 0.8 v v ih high level input voltage 2.0 - v dd + 0.5 v i li input leakage current v i =0tov dd - 10 - +10 m a t r input rise time between 10% and 90% -- 80 ns t f input fall time between 90% and 10% -- 80 ns i 2 c/ dc ( pin 2) v il low level input voltage 0 - 0.8 v v ih high level input voltage 2.0 - v dd v i li input leakage current v i =0tov dd - 10 - +10 m a scl ( pin 4) v il low level input voltage - 0.3 - 1.5 v v ih high level input voltage 3.0 - v dd + 0.5 v f clk clock frequency 0 - 100 khz t r input rise time between 10% and 90% -- 2 m s t f input fall time between 90% and 10% -- 2 m s i li input leakage current v i =0 tov dd - 10 - +10 m a c i input capacitance -- 10 pf inputs/outputs c eramic resonator ( pins 20, 21 and 22); see fig.5 f osc oscillator frequency 11.82 12 12.18 mhz c0 parallel capacitance - 5.35 - pf c1 series capacitance - 37.4 - pf l1 series inductance - 35.5 -m h r1 series resistance - 625 w black ( pin 23) c black storage capacitor to ground - 100 - nf v black black level voltage for nominal sync amplitude 1.8 2.15 2.5 v i li input leakage current v i =0tov dd - 10 - +10 m a symbol parameter conditions min. typ. max. unit
1996 jul 18 8 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 sda ( pin 3; open drain ) v il low level input voltage - 0.3 - +1.5 v v ih high level input voltage 3.0 - v dd + 0.5 v i li input leakage current v i =0tov dd - 10 - +10 m a c i input capacitance -- 10 pf t r input rise time between 10% and 90% -- 2 m s t f input fall time between 90% and 10% -- 2 m s v ol low level output voltage i ol = 3 ma 0 - 0.5 v t f output fall time between 3 v and 1 v -- 200 ns c l load capacitance -- 400 pf dr ( pin 5; open drain ) v il low level input voltage - 0.3 - +1.5 v v ih high level input voltage 3.0 - v dd + 0.5 v i li input leakage current v i =0tov dd - 10 - +10 m a v ol low level output voltage i ol = 1.6 ma 0 - 0.4 v t f output fall time between 4 v and 1 v with 3.3 k w to 5 v -- 50 ns c l load capacitance -- 100 pf outputs r, g and b( pins 15, 14 and 13; caption mode ) v ol low level output voltage i ol =+2ma 0 - 0.2 v v oh high level output voltage i oh = - 2ma v 17 - 0.3 v 17 v 17 + 0.4 v z o output impedance -- 200 w c l load capacitance -- 50 pf t r output rise time between 10% and 90% -- 10 ns t f output fall time between 90% and 10% -- 10 ns blan ( pin 16) v ol low level output voltage i ol =+2ma 0 - 0.4 v v oh high level output voltage i oh = - 2 ma 1.1 - 2.8 v c l load capacitance -- 50 pf t r output rise time between 10% and 90% -- 10 ns t f output fall time between 90% and 10% -- 10 ns t skew skew delay time between display and r, g, b, blan -- 10 ns symbol parameter conditions min. typ. max. unit
1996 jul 18 9 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 note 1. these inputs are analog, v il and v ih values are quoted as a guide for digital rgb users. i 2 c timing (see fig.3) t low clock low time 4 --m s t high clock high time 4 --m s t su;dat data set-up time 250 -- ns t hd;dat data hold time 170 -- ns t su;sto set-up time from clock high-to-stop 4 --m s t buf start set-up time following a stop 4 --m s t hd;sta start hold time 4 --m s t su;sta start set-up time following clock low-to-high transition 4 --m s t r output rise time between 10% and 90% -- 10 ns t f output fall time between 90% and 10% -- 10 ns symbol parameter conditions min. typ. max. unit fig.3 i 2 c-bus timing diagram. handbook, full pagewidth mbc764 t buf t f t high t su;dat t su;sto t hd;dat t su;sta t r t low t hd;sta sda scl sda
1996 jul 18 10 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 application information fig.4 application diagram. (1) value dependent on application. handbook, full pagewidth mbb624 - 2 v ss dd v rgbref blan r g b oscin oscgnd oscout black iref SAA5252 27 k w 100 nf c4 c3 33 pf c2 33 pf 12 mhz c7 100 nf 5 v 5 v 5 v c6 10 m f (1) (1) 13 14 15 16 17 18 19 20 21 22 23 24 v h i.c. blanin rin gin bin sda scl i c/dc 2 cvbs dr 100 nf c5 2 cvbs 1 3 4 5 6 7 8 9 10 11 12 5 v i c-bus to microcontroller 2 3.3 k w to microcontroller c3 10 nf fig.5 ceramic resonator equivalent circuit. mea560 c1 l1 r1 c0
1996 jul 18 11 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 display generator general description the displayed characters are defined on a 5-by-12 matrix within a 7-by-13 window, allowing one blank pixel either side of the character and a blank pixel row above. there are a number of display options available controlled by register 1, or external pins in stand-alone mode. the three display modes are video, text and caption, the device is powered up in the video mode. the display generator reads the pre-amble address code (pac) then the data associated with that row. each character is then rounded after which it can be italicized and/or underlined, depending on the pac or mid-row codes, before being passed on to the output circuitry. figure 6 shows the character set. display of external on-screen display (osd) facilities the r, g, b and blan outputs of the display have the capability to be put in a 3-state mode allowing other osd devices to take control of the television r, g, b and blan signals. when the blanin is held high then the r, g, b and blan outputs from display are disabled and the r, g, b and blan signals come directly from the rgbin and blanin inputs. this will allow on-screen display to be placed on top of the captioning without any corruption, leaving the captions intact when the on-screen display is switched off (blanin goes low). in this form of operation the rgbin and rgbout pins can be considered transparent; blanin goes through the normal output buffer to blan. table 1 register map (write) table 2 register map (read) register d7 d6 d5 d4 d3 d2 d1 d0 00 df 1/2 rgb, blan + ve/ - ve h +ve/ - ve v +ve/ - ve h3 h2 h1 h0 01 clear ch 2/ 1 narrow/ wide acq off en1 en0 m1 m0 02 -- - - row3 row2 row1 row0 03 -- - col4 col3 col2 col1 col0 04 - osd6 osd5 osd4 osd3 osd2 osd1 osd0 register d7 d6 d5 d4 d3 d2 d1 d0 80 por 0 0 0 f1/f2 eds parity shutdown data ready 81 parity error data bit 7 data bit 6 data bit 5 data bit 4 data bit 3 data bit 2 data bit 1 82 parity error data bit 7 data bit 6 data bit 5 data bit 4 data bit 3 data bit 2 data bit 1
1996 jul 18 12 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 fig.6 character set. the 0 and zero use the same character, 4fh. 1 0 0 1 01 1 magenta b 3 b 2 b 1 b 0 b 4 b 5 b 6 0 1 234 56 7 column r o w 0 0 0 0 1 0 0 1 11 1 0 1 1 e 1 1 1 0 f 1 1 1 1 b 1 0 1 1 yellow underline c 1 1 0 0 d 1 1 0 1 magenta underline a 1 0 1 0 yellow 9 1 0 0 1 red underline 8 1 0 0 0 red 7 0 1 1 1 cyan underline 6 0 1 1 0 cyan 5 0 1 0 1 4 0 1 0 0 blue 3 0 0 1 1 green underline 2 0 0 1 0 green 0 0 0 0 0 white 1 0 0 0 1 white underline blue underline italics italics underline 0 0 1 mbb625 - 2 signifies "flash on" command signifies a transparent space
1996 jul 18 13 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 i 2 c interface description of write registers the write subaddresses auto increment from 0 through to 4 at which point they stay until a new write subaddress is sent. registers are set to all logic 0 at power-up. table 3 register 0 write (control byte 1) table 4 register 1 write (control byte 2) table 5 register 2 write (on-screen display data row address) table 6 register 3 write (on-screen display data column address) table 7 register 4 write (on-screen display data) bit description d0 to d3 h0 to h3 set the offset position from the start of the horizontal sync pulse, set to a nominal value on reset. d4 vertical sync pulse expected to be negative going logic 0 or positive-going logic 1. d5 horizontal sync pulse expected to be negative going logic 0 or positive-going logic 1. d6 video outputs will be positive going logic 0 or negative-going logic 1. d7 data field select. when set to logic 0 field 1 is decoded, when set to logic 1 field 2 is decoded. bit description d0, d1 display mode selection bits. table 8 shows the possible display modes. d2, d3 enhanced caption mode selection bits. table 9 shows the possible enhanced caption modes. d4 when set to logic 1 acquisition of caption data is inhibited to allow the display to be used for on-screen display purposes. d5 acquisition window selection. when set to logic 0 only line 21 is checked for caption data. when set to logic 1, lines 19 to 23 of both ?elds are checked, allowing encrypted video signals to be handled. d6 user channel selection. d7 clears the page memory when set high. the page memory will be within two ?elds (30 ms). bit description d0 to d3 row 0 to 3 sets the row address for on-screen display. this stored value will be incremented by over?ow increments of register 3. bit description d0 to d4 columns 0 to 4 sets the column address for on-screen display. this stored value will be incremented by writes to register 4. bit description d0 to d6 osd0 to osd6, on-screen display data bits writing to this register causes register 3 to increment its stored value.
1996 jul 18 14 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 table 8 display modes table 9 enhanced caption modes description of read registers the read subaddresses auto increment from 80h through to 82h at which point they stay until a new read subaddress is sent. all the bits in table 10 are reset to logic 0 after the register is read. table 10 register 80h read (status) table 11 register 81h read (?rst data byte) note 1. in the line 21, specification data bits are numbered d1 to d8. table 12 register 82h read (second data byte) note 1. in the line 21, specification data bits are numbered d1 to d8. display mode options m1 m0 video only 0 0 text mode 0 1 normal caption mode 1 0 enhanced caption mode 1 1 enhanced caption modes en1 en0 enhanced caption modes en1 en0 shadowed character/video background 0 0 shadowed character/mesh background 0 1 normal character/video background 1 0 normal character/mesh background 1 1 bit description d0 data ready (new data has been acquired). d1 parity error shut-down, goes high when SAA5252 has a parity shut-down condition. d2 indicates the following bytes are extended data service bytes. d3 indicates field 1 or field 2 data bytes. d7 indicates power-on reset (por) has occurred, all i 2 c-bus write registers have been reset to logic 0. bit description d0 to d6 data bit 1 to data bit 7 (see note 1). d7 parity error flag bit. bit goes high when a parity error has occurred. bit description d0 to d6 data bit 1 to data bit 7 (see note 1). d7 parity error flag bit. bit goes high when a parity error has occurred.
1996 jul 18 15 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 interface to microcontroller using i 2 c-bus the interface to the microcontroller is via the two-wire serial i 2 c-bus, and optionally by a data-ready signal ( dr). on power up the microcontroller initializes the device by an i 2 c-bus write to registers 0 (control byte 1). the i 2 c-bus subaddress is then auto incremented to point to register 1 (control byte 2). these two registers configure the device to the users requirements. if the device is to be used for data acquisition only, then there are three methods by which the microcontroller can be informed of the arrival of valid line 21 data: it can poll the dr pin, if the function has been enabled, and wait for it to go low. it can use the negative edge of the dr signal to cause an interrupt. it can poll the data ready bit (bit d0 of the status byte, i 2 c-bus read register 0). when valid data is detected, the microcontroller must initiate an i 2 c-bus read of registers 80h, 81h and 82h. the first and second data bytes from the most recently received line 21 are in register 81h and register 82h respectively. the dr pin, and the data ready bit (status bit d0) will be cleared after any register has been read. por is reset after register 80h has been read. stand-alone (non i 2 c-bus) operation to set the SAA5252 for stand-alone operation pin 2 (i 2 c/ dc) is tied low. this will change the operation of the scl, sda and dr pins to mode select inputs which will select as shown in table 13. in the caption mode the SAA5252 operates in the basic normal character/black background mode. this complies with the fcc ruling. in the enhanced caption mode the set-up will be shadowed character/video background. sda and scl in the stand-alone operation act as bits m0 and m1 in table 8. table 13 stand-alone modes dr scl sda mode of operation channel reception 0 0 0 video mode channel 1 0 0 1 text mode channel 1 0 1 0 normal captions channel 1 0 1 1 enhanced captions channel 1 1 0 0 video mode channel 2 1 0 1 text mode channel 2 1 1 0 normal captions channel 2 1 1 1 enhanced captions channel 2
1996 jul 18 16 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 package outlines unit a max. 1 2 b 1 cd e e m h l references outline version european projection issue date iec jedec eiaj mm inches dimensions (inch dimensions are derived from the original mm dimensions) sot101-1 92-11-17 95-01-23 a min. a max. b w m e e 1 1.7 1.3 0.53 0.38 0.32 0.23 32.0 31.4 14.1 13.7 3.9 3.4 0.25 2.54 15.24 15.80 15.24 17.15 15.90 2.2 5.1 0.51 4.0 0.066 0.051 0.021 0.015 0.013 0.009 1.26 1.24 0.56 0.54 0.15 0.13 0.01 0.10 0.60 0.62 0.60 0.68 0.63 0.087 0.20 0.020 0.16 051g02 mo-015ad m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 24 1 13 12 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. z max. (1) (1) (1) dip24: plastic dual in-line package; 24 leads (600 mil) sot101-1
1996 jul 18 17 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot137-1 x 12 24 w m q a a 1 a 2 b p d h e l p q detail x e z c l v m a 13 (a ) 3 a y 0.25 075e05 ms-013ad pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.61 0.60 0.30 0.29 0.050 1.4 0.055 0.42 0.39 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 92-11-17 95-01-24 e 1 0 5 10 mm scale so24: plastic small outline package; 24 leads; body width 7.5 mm sot137-1
1996 jul 18 18 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). dip s oldering by dipping or by wave the maximum permissible temperature of the solder is 260 c; solder at this temperature must not be in contact with the joint for more than 5 seconds. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg max ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. r epairing soldered joints apply a low voltage soldering iron (less than 24 v) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds. so r eflow soldering reflow soldering techniques are suitable for all so packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. w ave soldering wave soldering techniques can be used for all so packages if the following conditions are observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow. the package footprint must incorporate solder thieves at the downstream end. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. r epairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1996 jul 18 19 philips semiconductors product speci?cation line twenty-one acquisition and display (litod) SAA5252 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. purchase of philips i 2 c components data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
internet: http://www.semiconductors.philips.com/ps/ (1) SAA5252_4 june 26, 1996 11:51 am philips semiconductors C a worldwide company ? philips electronics n.v. 1996 sca50 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 83749, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 926 5361, fax. +7 095 564 8323 singapore: lorong 1, toa payoh, singapore 1231, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: rua do rocio 220, 5th floor, suite 51, 04552-903 s?o paulo, s?o paulo - sp, brazil, tel. +55 11 821 2333, fax. +55 11 829 1849 spain: balmes 22, 08007 barcelona, tel. +34 3 301 6312, fax. +34 3 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 632 2000, fax. +46 8 632 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2686, fax. +41 1 481 7730 taiwan: philips taiwan ltd., 23-30f, 66, chung hsiao west road, sec. 1, p.o. box 22978, taipei 100, tel. +886 2 382 4443, fax. +886 2 382 4444 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine: philips ukraine, 2a akademika koroleva str., office 165, 252148 kiev, tel. +380 44 476 0297/1642, fax. +380 44 476 6991 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 708 296 8556 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 825 344, fax.+381 11 635 777 for all other countries apply to: philips semiconductors, marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 200 733, fax. +375 172 200 773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 689 211, fax. +359 2 689 102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 708 296 8556 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. +45 32 88 2636, fax. +45 31 57 1949 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 615 800, fax. +358 615 80920 france: 4 rue du port-aux-vins, bp317, 92156 suresnes cedex, tel. +33 1 40 99 6161, fax. +33 1 40 99 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 23 52 60, fax. +49 40 23 536 300 greece: no. 15, 25th march street, gr 17778 tavros, tel. +30 1 4894 339/911, fax. +30 1 4814 240 hungary: see austria india: philips india ltd, shivsagar estate, a block, dr. annie besant rd. worli, mumbai 400 018, tel. +91 22 4938 541, fax. +91 22 4938 722 indonesia: see singapore ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 648 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +1 800 234 7381, fax. +1 708 296 8556 middle east: see italy printed in the netherlands 537021/01/04/pp20 date of release: 1996 jul 18 document order number: 9397 750 00975

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